EE 632 Analog Integrated Circuit Design

  • What are we going to learn?

    • Introduction to CMOS analog integrated circuit design. MOS transistor as the basic design unit: device structure, I-V characteristics, second order effects, SPICE models. Basic amplifier topologies: CS, CG, CD, cascode amplifiers. Differential amplifiers: single ended and differential operation, small signal analysis. Current mirrors: passive and active topologies. Performance parameters of analog circuits: frequency response, noise. Feedback in analog integrated circuits: types of feedback, stability and frequency compensation. Operational amplifiers: topologies, performance parameters. Layout of analog integrated circuits.

    Which book should we refer to?

    • Behzad Razavi, "Design of Analog CMOS Integrated Circuit," Tata McGraw Hill
      Phillip E. Allen and Douglas R. Holberg, "CMOS Analog Circuit Design," Oxford University Press
      R. Jacob Baker, Harry W. Li, and David E. Boyce, "CMOS Circuit Design, Layout, and Simulation," Prentice Hall of India
      Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, and Robert G. Meyer, "Analysis and Design of Analog Integrated Circuits," Wiley India

    Do we use any simulation tools?

    • We will be using LTspice and Electric for schematic and layout design and simulation. Installation files for Windows systems can be found here. Use IIT Goa credentials to download the files.

    Who is going to help us?

    Where can we access the course material?

    • We will be using Moodle for course management. A discussion forum will be maintained at Piazza and a Telegram channel will be used for announcements. Check your inbox for invites to these.

    How are we going to get graded?

    • The final score will have the following weight distribution (tentative). Apart from the listed items, bonus points can be earned by participating in the discussion forum and in-video activities.
    • 50% - Continuous evaluation based on quizzes and assignments
      15% - Midsem examination
      15% - Course project
      20% - Endsem examination