EE 636 VLSI Design

  • What are we going to learn?

    • Review of MOS transistor models, CMOS logic families including static, dynamic and dual rail logic. Integrated circuit layout; design rules, parasites. Building blocks, ALU, Memory and sense amplifier, FIFO, counters, VLSI design: data and control path design, floor planning, Design Technology: introduction to hardware description languages(VHDL), logic, circuit and layout verification. Design examples.

    Which book should we refer to?

    • Jan M. Rabaey, Anantha P. Chandrakasan, and Borivoje Nikolic, "Digital Integrated Circuits," Englewood Cliffs: Prentice Hall
      Neil Weste and Kamran Eshraghian, "Principles of CMOS VLSI Design," Addison Wesley
      Lance A. Glasser and Daniel W. Dobberpuhl, "The Design and Analysis of VLSI Circuits," Addison Wesley
      C. Mead and L. Conway, "Introduction to VLSI Systems," Addison Wesley
      Douglas L. Perry, "VHDL," McGraw Hill

    Do we use any simulation tools?

    • We will be using LTspice and Electric for schematic and layout design and simulation. Installation files for Windows systems can be found here. Use IIT Goa credentials to download the files.

    Who is going to help us?

    Where can we access the course material?

    • We will be using Moodle for course management. A Telegram channel will be used for announcements. Check your inbox for invites to these.

    How are we going to get graded?

    • The final score will have the following weight distribution (tentative).
    • 30% - Continuous evaluation based on quizzes and assignments
      25% - Midsem examination
      15% - Course project
      30% - Endsem examination